發(fā)布時間：2018-01-20 12:30

  本文關(guān)鍵詞： FPGA IPv6 千兆以太網(wǎng)網(wǎng)絡(luò) 網(wǎng)絡(luò)測試 數(shù)據(jù)包　出處：《昆明理工大學》2016年碩士論文　論文類型：學位論文

【摘要】：FPGA技術(shù)在網(wǎng)絡(luò)通信、電子信息等領(lǐng)域都有廣泛的應(yīng)用。它具備可靠性高、高速處理數(shù)據(jù)信息等優(yōu)點,且與微處理器技術(shù)相比,具有無操作系統(tǒng)、硬件結(jié)構(gòu)類似于模擬系統(tǒng)的優(yōu)勢。此外,FPGA技術(shù)還有復雜度小、容易于驗證、兼容性好、數(shù)據(jù)處理速度極高、信息吞吐量大、邏輯資源量豐富等特點。所以,FPGA技術(shù)應(yīng)用在網(wǎng)絡(luò)測試系統(tǒng)中有較好的優(yōu)勢。為了能夠滿足IPv6千兆以太網(wǎng)網(wǎng)絡(luò)設(shè)備的測試要求,且定量分析IPv6網(wǎng)絡(luò)設(shè)備諸如吞吐量、時延、丟包率、背靠背、均衡負載等一系列衡量系統(tǒng)性能的參數(shù)指標,本測試系統(tǒng)充分利用FPGA技術(shù)。為了可以高速處理數(shù)據(jù)信息,以FPGA為主芯片,設(shè)計了一款I(lǐng)Pv6千兆以太網(wǎng)網(wǎng)絡(luò)測試卡。該IPv6千兆以太網(wǎng)絡(luò)測試板卡配合專用的測試機箱在專用的軟件測試平臺構(gòu)成了IPv6千兆以太網(wǎng)絡(luò)測試系統(tǒng)從而實現(xiàn)對IPv6網(wǎng)的測試。本論文重點介紹了該測試板卡的硬件結(jié)構(gòu)、工作原理,包括該測試板卡的主要元器件、接口、通信總線以及與專用的測試機箱、測試軟件平臺配合后構(gòu)成完整的IPv6網(wǎng)絡(luò)測試系統(tǒng)。然后,利用華三公司高性能千兆路由器作為被測試網(wǎng)絡(luò)設(shè)備,對該IPv6千兆以太網(wǎng)測試系統(tǒng)進行IPv6網(wǎng)絡(luò)的測試驗證、分析表明：該測試系統(tǒng)所測試的吞吐量、時延、丟包率、負載均衡、背靠背、QoS等各項性能指標均符合國家相關(guān)測試標準,能夠達到線速處理能力、性價比較高,而且該系統(tǒng)還可以便于以后的擴展和升級。所以該IPv6網(wǎng)絡(luò)測試系統(tǒng)具有廣闊的應(yīng)用空間和應(yīng)用前景。
[Abstract]:FPGA technology in network communication, electronic information and other fields are widely used. It has high reliability, high speed data processing information etc., and compared with the microprocessor technology, with no operating system, the hardware structure is similar to the simulation system. In addition, FPGA also has technical complexity, easy to verify, good compatibility the data processing speed, high throughput, large amount of information, logical resource rich features. Therefore, the application of FPGA technology has a good advantage in the network test system. In order to meet the IPv6 Gigabit Ethernet network equipment test requirements, and quantitative analysis of IPv6 network equipment such as throughput, delay, packet loss rate, back-to-back, load balance a series of measure system performance parameters of the test system. In order to make full use of FPGA technology in high speed data processing information, based on FPGA chip, the design of a Gigabit to IPv6 So network test card. The IPv6 Gigabit Ethernet test board with special test chassis to form IPv6 Gigabit Ethernet network test system in software testing platform dedicated to realize the IPv6 network test. This paper introduces the hardware structure, the working principle of the test board, including the test board main component, interface communication bus and chassis test, special test software platform, with the IPv6 network test system complete. Then, by three China's high performance Gigabit router as network equipment under test, analysis of test, the IPv6 network of the IPv6 Gigabit Ethernet test system show that the test system test throughput. Time delay, packet loss rate, load balancing, back to back, the performance of QoS are in line with national testing standards, can achieve line speed processing ability, price It is relatively high, and the system can also be extended and upgraded in the future. So the IPv6 network testing system has a broad application space and application prospects.

【學位授予單位】：昆明理工大學
【學位級別】：碩士
【學位授予年份】：2016
【分類號】：TP393.06
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本文編號：1448192