發(fā)布時(shí)間：2018-06-09 14:51

  本文選題：片上多核處理器 + 共享L2Cache劃分�。� 參考：《哈爾濱工程大學(xué)》2013年碩士論文

【摘要】：隨著多核處理器體系結(jié)構(gòu)的飛速發(fā)展，片上多核處理器以其特有的優(yōu)勢(shì)成為主流多核處理器架構(gòu)被廣泛應(yīng)用到服務(wù)器、PC機(jī)等商品中，對(duì)其進(jìn)行的研究也在不斷深入。多核處理器在多任務(wù)處理、高性能計(jì)算方面優(yōu)勢(shì)顯著，但還存在著制約其性能發(fā)揮的因素，如存儲(chǔ)墻問題在多核處理器系統(tǒng)中依然嚴(yán)重，極大地影響了多核處理器系統(tǒng)總體性能的進(jìn)一步提升。 針對(duì)以上問題，本文將從共享L2Cache資源劃分技術(shù)和應(yīng)用程序的L2Cache訪問類型感知的數(shù)據(jù)塊替換策略兩個(gè)方面具體闡述基于CMP的共享L2Cache管理策略。首先，，在片上多核處理器的基礎(chǔ)上，針對(duì)現(xiàn)有劃分技術(shù)中普遍忽略的失效開銷差異性問題，提出了一種基于訪存時(shí)間的L2Cache公平性劃分策略，該策略通過L2MSHR、監(jiān)測(cè)器和HSHR三種硬件配置獲取失效率并行度信息計(jì)算各線程在獨(dú)占和共享L2Cache兩種情況下運(yùn)行時(shí)間，并在MTFP算法和公平性評(píng)價(jià)指標(biāo)FairT的指導(dǎo)下獲得每個(gè)劃分周期內(nèi)各線程的分配路數(shù)。同時(shí)，針對(duì)LRU策略在大工作集應(yīng)用程序和時(shí)間局部性差的流式應(yīng)用程序中存在的性能嚴(yán)重下降的問題，提出了一種基于L2Cache訪存訪問類型感知的替換策略，該策略在ADC算法的指導(dǎo)下感知各個(gè)應(yīng)用程序在不同時(shí)間周期內(nèi)體現(xiàn)出的不同L2Cache訪存類型動(dòng)態(tài)調(diào)整提升和插入方式，有效地降低了低頻訪問數(shù)據(jù)塊和零重用數(shù)據(jù)塊在L2Cache的駐留時(shí)間。 最后，結(jié)合MTFP策略和RPBL策略提出L2Cache管理策略LMSC，并對(duì)LMSC策略的運(yùn)行機(jī)制進(jìn)行了具體闡述。通過基于Gems和Simics的性能評(píng)價(jià)方案，從吞吐率、公平性和加權(quán)加速比三個(gè)方面對(duì)LMSC策略進(jìn)行測(cè)評(píng)。實(shí)驗(yàn)結(jié)果表明：與LRU策略相比，LMSC策略能夠在保證系統(tǒng)吞吐率的同時(shí)提升了加權(quán)加速比和系統(tǒng)公平性，具有良好的研究?jī)r(jià)值。
[Abstract]:With the rapid development of multi-core processor architecture, multi-core processor on chip has become the mainstream multi-core processor architecture because of its unique advantages. Multi-core processors have significant advantages in multi-task processing and high-performance computing, but there are still some factors that restrict their performance. For example, the problem of storage wall is still serious in multi-core processor systems. Has greatly affected the further improvement of the overall performance of multi-core processor systems. This paper describes the shared L2Cache management strategy based on CMP from two aspects: shared L2Cache resource partition technology and L2Cache access type aware data block replacement strategy of application program. Firstly, on the basis of multi-core processor on chip, a L2Cache fairness partitioning strategy based on memory access time is proposed, which is generally ignored in the existing partition technology. Through L2MSHRR, monitor and HSHR hardware configuration, the strategy acquires the failure rate parallelism information to calculate the running time of each thread in the case of exclusive and shared L2Cache. Under the guidance of MTFP algorithm and FairT, the number of allocation paths for each thread in each partition cycle is obtained. At the same time, a replacement strategy based on L2Cache access type awareness is proposed to solve the problem of serious degradation of LRU policy performance in large working set applications and streaming applications with poor temporal locality. Under the guidance of ADC algorithm, this strategy is aware of the different L2Cache memory access types dynamically adjusted and inserted in different applications in different time cycles. The low frequency access data block and the zero reuse data block residence time in L2Cache are reduced effectively. Finally, L2Cache management policy LMSCS is proposed by combining MTFP policy with RPBL policy, and the running mechanism of LMSC policy is expounded in detail. Through the performance evaluation scheme based on Gems and Simics, the LMSC strategy is evaluated from three aspects: throughput, fairness and weighted speedup. The experimental results show that compared with LRU strategy, LMSC strategy can improve the weighted speedup and system fairness while ensuring the throughput of the system, and has good research value.
【學(xué)位授予單位】：哈爾濱工程大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP332

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