發(fā)布時間：2018-03-17 19:51

  本文選題：同時同頻全雙工　切入點：FPGA　出處：《南京理工大學》2017年碩士論文　論文類型：學位論文

【摘要】：隨著移動通信的快速發(fā)展,5G通信標準的制定工作逐步開展,作為5G關鍵技術之一的同時同頻全雙工技術受到國內外的廣泛關注。本文以標準的LTE通信頻段為應用背景,對同時同頻全雙工對消系統(tǒng)及其關鍵部件進行了深入研究。相比在WARP、USDR等軟件無線電平臺上實現同時同頻全雙工系統(tǒng),本文的研究成果可以為實際應用提供一體化、小型化的研究基礎。本文的主要研究內容如下:(1)設計了一種工作頻率為2.4GHz的同時同頻全雙工對消系統(tǒng)方案。此方案基于射頻重構模擬自干擾對消技術,先利用發(fā)射信號作參考本振信號與自干擾信號直接正交混頻,然后通過FPGA控制系統(tǒng)提取自干擾信號的相幅信息,進而控制改進型數字矢量調制器對發(fā)射參考信號進行重構,最終實現對自干擾信號的對消。通過Matlab軟件仿真驗證了該方案的可行性,取得較好的對消效果。(2)設計和實現了對消系統(tǒng)中的各模塊,包括自干擾對消模塊、自干擾信號檢測模塊和控制模塊。主要研制了正交耦合器、矢量調制器、合路器(功分器)、正交混頻器、射頻放大器、有源低通濾波器和誤差放大器以及FPGA控制電路等關鍵部件。(3)基于FPGA完成了 AD、DA和相幅計算等模塊構成的整個系統(tǒng)軟件,并通過實測驗證了本系統(tǒng)的可行性。
[Abstract]:With the rapid development of mobile communication, the establishment of 5G communication standard has been carried out step by step. As one of the key technologies of 5G, simultaneous full-duplex technology has attracted wide attention at home and abroad. In this paper, the standard LTE communication frequency band is used as the application background. In this paper, the simultaneous full duplex cancellation system and its key components are deeply studied. Compared with the software radio platform such as WARPU USDR, the research results of this paper can provide integration for practical applications. The main contents of this paper are as follows: (1) A scheme of simultaneous full-duplex cancellation with working frequency of 2.4 GHz is designed. This scheme is based on RF reconfigurable analog self-interference cancellation technology. First, the transmitted signal is used as the reference local oscillator signal and the self-interference signal is directly orthogonal mixed, then the phase amplitude information of the self-interference signal is extracted through the FPGA control system, and then the modified digital vector modulator is controlled to reconstruct the transmitted reference signal. Finally, the self-interference signal cancellation is realized. The feasibility of the scheme is verified by Matlab software simulation, and the design and implementation of each module in the cancellation system, including the self-interference cancellation module, is achieved. Self-interference signal detection module and control module. The orthogonal coupler, vector modulator, combiner (power divider, quadrature mixer, RF amplifier) are developed. Active low-pass filter, error amplifier and FPGA control circuit are the key components. The whole system software is completed based on FPGA, and the feasibility of the system is verified by actual measurement.
【學位授予單位】：南京理工大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN929.5

【參考文獻】

相關期刊論文 前4條

1 王俊;趙宏志;馬萬治;唐友喜;卿朝進;;同時同頻全雙工寬帶射頻自干擾抵消性能分析[J];通信學報;2016年09期

2 焦秉立;馬猛;;同頻同時全雙工技術淺析[J];電信網技術;2013年11期

3 張志亮;羅龍;邵士海;潘文生;沈瑩;唐友喜;;ADC量化對同頻全雙工數字自干擾消除的誤碼率性能分析[J];電子與信息學報;2013年06期

4 萬德松;游彬;孫玲玲;;超高頻RFID高隔離度定向耦合器的設計[J];電子技術應用;2008年11期

，

本文編號：1626242