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  本文選題：高速光纖通信　切入點：Aurora協(xié)議　出處：《中北大學》2017年碩士論文

【摘要】：隨著雷達測試、遙感衛(wèi)星、網(wǎng)絡(luò)系統(tǒng)通信等領(lǐng)域系統(tǒng)數(shù)據(jù)帶寬不斷增大,相應(yīng)的數(shù)據(jù)傳輸系統(tǒng)要求越來越高,只有具備高速數(shù)據(jù)采集與傳輸能力,才能實現(xiàn)龐大的數(shù)據(jù)流交互,滿足相關(guān)領(lǐng)域?qū)Ω咚贁?shù)據(jù)獲取能力的需求。為此,本課題開展了10Gbps級高速數(shù)據(jù)采集與傳輸系統(tǒng)相關(guān)技術(shù)的研究。本文主要研究高速光纖數(shù)據(jù)采集與傳輸系統(tǒng)相關(guān)技術(shù),包括光纖通信理論研究,計算機通信總線協(xié)議分析,高速大容量緩存電路設(shè)計,以及測試系統(tǒng)集成解決方案分析,具體工作包括以下幾個方面:(1)利用SFP光模塊設(shè)計具備10Gbps級通信能力的高速光纖數(shù)據(jù)收發(fā)硬件電路,通過Xilinx公司Aurora IP核結(jié)合FPGA內(nèi)部邏輯實現(xiàn)基于Aurora協(xié)議的10Gbps級光纖通信控制器,并對光纖接口通信能力進行測試;(2)研究標準系統(tǒng)總線PCI-Express 2.1通信協(xié)議,利用Xilinx公司PCI-Express2.1IP核,設(shè)計基于DMA數(shù)據(jù)傳送模式的PCI-Express通信引擎,并與上位機軟件配合實現(xiàn)計算機與硬件功能卡交互;(3)針對高速數(shù)據(jù)采集系統(tǒng)常見的緩存容量不足問題,設(shè)計了一個高速容量可擴展緩存電路,最大支持容量擴展至8GB,最大工作頻率1600MHz,并利用FPGA內(nèi)部邏輯設(shè)計了緩存電路控制器,實現(xiàn)數(shù)據(jù)高速緩存。最后充分調(diào)研測試測量行業(yè)先進測試理論成果,制定了完整測試方案,搭建了系統(tǒng)測試平臺,通過時域和頻域分析驗證系統(tǒng)功能,利用上位機測速軟件進行數(shù)據(jù)速率測試。測試結(jié)果表明本課題設(shè)計的高速光纖數(shù)據(jù)采集與傳輸系統(tǒng)能夠進行高速數(shù)據(jù)采集與傳輸,系統(tǒng)最大數(shù)據(jù)傳輸能力達到10Gbps,滿足目前大多數(shù)測試領(lǐng)域?qū)Ω咚贁?shù)據(jù)采集與傳輸?shù)男枨?具有很強的實用性。
[Abstract]:With the radar testing, remote sensing satellite, network system communication and other areas of system data bandwidth increasing, the corresponding data transmission system requirements are higher and higher, only with the ability of high-speed data acquisition and transmission, can realize the huge data flow interaction. In order to meet the demand of high speed data acquisition ability in related fields, this paper has carried out the research of 10Gbps level high speed data acquisition and transmission system related technology, this paper mainly studies the high speed optical fiber data acquisition and transmission system correlation technology, Including optical fiber communication theory research, computer communication bus protocol analysis, high-speed large capacity buffer circuit design, and test system integration solution analysis. The specific work includes the following aspects: (1) using SFP optical module to design high speed optical fiber data transceiver hardware circuit with 10Gbps level communication capability, and realizing 10Gbps class optical fiber communication controller based on Aurora protocol through Aurora IP core of Xilinx company and internal logic of FPGA. The standard system bus PCI-Express 2.1 communication protocol is studied, and the PCI-Express communication engine based on DMA data transmission mode is designed by using PCI-Express2.1IP core of Xilinx Company. In order to solve the problem of insufficient cache capacity in high speed data acquisition system, an extensible cache circuit with high speed capacity is designed. The maximum supporting capacity is extended to 8GB, the maximum working frequency is 1600MHz, and the buffer circuit controller is designed by using the internal logic of FPGA to realize data cache. The system testing platform is built, and the function of the system is verified by time-domain and frequency-domain analysis. The test results show that the high speed optical fiber data acquisition and transmission system designed in this paper can collect and transmit data at high speed. The maximum data transmission capacity of the system is up to 10Gbps. it meets the needs of high-speed data acquisition and transmission in most test fields and has strong practicability.
【學位授予單位】：中北大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TP274.2

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