發(fā)布時(shí)間：2018-05-07 03:32

  本文選題：物理不可克隆函數(shù) + 工藝偏差��； 參考：《寧波大學(xué)》2014年碩士論文

【摘要】：物理不可克隆函數(shù)（Physical Unclonable Functions，PUF）電路作為一種新型的密鑰生成電路，利用集成電路（Integrated Circuit，IC）制造過程中的工藝參數(shù)偏差，在相同的電路結(jié)構(gòu)下產(chǎn)生多個(gè)不同的密鑰數(shù)據(jù)，實(shí)現(xiàn)具有芯片身份標(biāo)識的硬件函數(shù)功能。PUF電路可用于數(shù)據(jù)加密、數(shù)字簽名、消息認(rèn)證以及硬件知識產(chǎn)權(quán)保護(hù)等多種信息系統(tǒng)，提高系統(tǒng)安全性。鑒此，本文以PUF電路為研究對象，在綜合分析PUF電路研究意義和當(dāng)前國內(nèi)外研究現(xiàn)狀情況下，提出多種新型的PUF電路設(shè)計(jì)方案，包括基于電流鏡的PUF電路設(shè)計(jì)、基于最優(yōu)控制電壓的PUF電路設(shè)計(jì)、基于SRAM的PUF電路設(shè)計(jì)和基于DAC的PUF電路設(shè)計(jì)。最后，采用Cadence等軟件，分析PUF電路在不同條件下的工作性能。論文的研究內(nèi)容主要包含以下幾個(gè)部分： 1、基于電流鏡的PUF電路設(shè)計(jì)：通過對電流鏡工作特性的研究，結(jié)合PUF電路的工作原理，將多路電流鏡作為PUF電路的偏差信號產(chǎn)生電路，用于產(chǎn)生隨機(jī)的電流信號，然后通過分析電流型敏感放大器的工作特性，將其作為PUF電路的輸出電路，用于比較偏差電流信號的大小，并產(chǎn)生輸出響應(yīng)信號，進(jìn)而實(shí)現(xiàn)PUF電路的功能。 2、基于最優(yōu)控制電壓的PUF電路設(shè)計(jì)：首先分析影響PUF電路可靠性的因素，確定提高PUF電路可靠性的方法，然后通過對MOSFET零溫度系數(shù)點(diǎn)（ZeroTemperatureCoefficient，ZTC）理論的研究，分析在工藝偏差情況下MOSFET的零溫度系數(shù)點(diǎn)變化情況，并與提高PUF電路可靠性方法相結(jié)合，提出基于最優(yōu)控制電壓的PUF電路設(shè)計(jì)方案，最終實(shí)現(xiàn)輸出響應(yīng)信號可靠的目的。 3、基于SRAM的PUF電路設(shè)計(jì)：首先對傳統(tǒng)SRAM-PUF電路的結(jié)構(gòu)和工作原理進(jìn)行研究，分析電路在讀操作過程中的穩(wěn)定性問題，然后結(jié)合SRAM單元電路和寄存器堆電路設(shè)計(jì)過程中提高讀穩(wěn)定性方法，提出一種新型的SRAM-PUF單元電路設(shè)計(jì)方案，通過對傳統(tǒng)的SRAM-PUF單元電路插入隔離管的方式，實(shí)現(xiàn)讀靜態(tài)噪聲容限有效提升的目的，最終提高電路的穩(wěn)定性。 4、基于DAC的PUF電路設(shè)計(jì)：通過對數(shù)模轉(zhuǎn)換器（Digital-to-Analog Converter，DAC）電路的研究，分析其輸出模擬信號的特點(diǎn)，結(jié)合PUF電路的設(shè)計(jì)方法，將兩組DAC作為PUF電路的偏差信號產(chǎn)生電路，然后結(jié)合提高PUF電路可靠性的方法，確定DAC的拓?fù)浣Y(jié)構(gòu)類型，，并分析其輸出電壓信號的偏差模型，最后借助靈敏放大器產(chǎn)生PUF電路的輸出響應(yīng)。 對于提出的幾種PUF電路設(shè)計(jì)方案均在TSMC65nm CMOS工藝或SMIC65nm CMOS工藝下進(jìn)行全定制版圖設(shè)計(jì)，并利用Spectre等工具對電路進(jìn)行Monte Carlo仿真。結(jié)果表明在不同的工作電壓或溫度下，電路均表現(xiàn)出較好的的隨機(jī)性和可靠性。
[Abstract]:The Physical Unclonable Functions (PUF) circuit is a new type of key generation circuit, using the process parameter deviation in the manufacturing process of Integrated Circuit (IC), producing a number of different key data under the same circuit structure, and realizing the function.PUF of the hardware function with the identity of the chip. The circuit can be used for data encryption, digital signature, message authentication and hardware intellectual property protection to improve the security of the system. In this paper, the PUF circuit is used as the research object. In the comprehensive analysis of the significance of PUF circuit research and the current situation at home and abroad, a variety of new PUF circuit design schemes are proposed, including based on the design of the circuit. PUF circuit design of current mirror, design of PUF circuit based on optimal control voltage, PUF circuit design based on SRAM and PUF circuit design based on DAC. Finally, using Cadence and other software, the performance of PUF circuit under different conditions is analyzed. The main contents of this paper include the following parts:
1, the PUF circuit design based on the current mirror: through the study of the working characteristics of the current mirror and the working principle of the PUF circuit, the multi current mirror is used as the deviation signal of the PUF circuit to produce the circuit, which is used to generate the random current signal. Then, by analyzing the working characteristics of the current sensitive amplifier, it is used as the output circuit of the PUF circuit, It is used to compare the magnitude of the bias current signal and generate the output response signal, so as to realize the function of the PUF circuit.
2, PUF circuit design based on the optimal control voltage: first, analyze the factors that affect the reliability of the PUF circuit, and determine the method to improve the reliability of the PUF circuit. Then through the study of the MOSFET zero temperature coefficient point (ZeroTemperatureCoefficient, ZTC) theory, the change of the zero temperature coefficient point of the MOSFET under the condition of the process deviation is analyzed, and the extraction of the zero temperature coefficient point of the MOSFET is analyzed. Combining the reliability method of high PUF circuit, a PUF circuit design scheme based on optimal control voltage is put forward, and finally the output response signal is reliable.
3, the design of PUF circuit based on SRAM: first, the structure and working principle of the traditional SRAM-PUF circuit are studied. The stability of the circuit is analyzed in the reading operation process. Then a new SRAM-PUF unit circuit design scheme is proposed, which combines the SRAM unit circuit and the register heap circuit design process to improve the reading stability. After the traditional SRAM-PUF unit is inserted into the isolating tube, the purpose of reading the static noise margin can be effectively enhanced, and finally the stability of the circuit is improved.
4, PUF circuit design based on DAC: through the study of the Digital-to-Analog Converter (DAC) circuit, the characteristics of its output analog signal are analyzed. Combined with the design method of PUF circuit, two groups of DAC are generated as the deviation signal of PUF circuit, and then the method of improving the reliability of the PUF circuit and determining the topology of DAC is determined. The deviation model of the output voltage signal is analyzed, and finally the output response of the PUF circuit is generated by means of a sensitive amplifier.
Some of the proposed PUF circuits are designed in the TSMC65nm CMOS process or SMIC65nm CMOS process, and the circuits are simulated with Monte Carlo using Spectre and other tools. The results show that the circuit shows good randomness and reliability at different working voltages or temperatures.

【學(xué)位授予單位】：寧波大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TN405

【參考文獻(xiàn)】

相關(guān)期刊論文 前5條

1 項(xiàng)群良;張培勇;歐陽冬生;馮忱暉;;多頻率段物理不可克隆函數(shù)[J];電子與信息學(xué)報(bào);2012年08期

2 秦志光;密碼算法的現(xiàn)狀和發(fā)展研究[J];計(jì)算機(jī)應(yīng)用;2004年02期

3 賀章擎;鄭朝霞;戴葵;鄒雪城;;基于PUF的高效低成本RFID認(rèn)證協(xié)議[J];計(jì)算機(jī)應(yīng)用;2012年03期

4 李海斌;周玉潔;;一種抗DPA攻擊的DES設(shè)計(jì)[J];通信技術(shù);2007年11期

5 吳志安;段成華;;采用全局互連線隨機(jī)模型的硅物理不可克隆函數(shù)的設(shè)計(jì)[J];微電子學(xué)與計(jì)算機(jī);2012年12期

本文編號：1855237